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| AN138 Application Note INTERFACING THE CS4954/5 TO THE SX28AC MICROCONTROLLER. INTRODUCTION This application note details the interface of the Crystal(R) CS4954/5 TV encoder to a Scenix SX28AC microcontroller. This note takes the reader through a simple example describing how to communicate with the encoder. All routines discussed are included in the Appendix at the end of this note. The SX28AC is compatible with the MicroChip PIC16C5X family. For more details on microcontrollers see the respective manufacturer's web site. SX28 RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7 10 11 12 13 14 15 16 17 CS4954 26 PDAT0 25 PDAT1 24 PDAT2 23 PDAT3 22 PDAT4 21 PDAT5 20 PDAT6 19 PDAT7 28 WR 27 RD 16 ADDR 34 RESET 29 CLKIN 6 RA0 7 RA1 8 RA2 9 RA3 OSC1 27 ENCODER DIGITAL INTERFACE The CS4954/5 interfaces to the SX28AC either through a parallel (13 wires) or a serial (2 wires) interface. Figure 1 depicts the interface between the two devices. The Encoder parallel interface consist of 13 lines, eight of which are data lines and the three control lines. The serial interface consist of one clock and one data line. PDAT[7:0] WR RD ADDR Host parallel data port Write strobe, active low Read strove, active low Address enable, active low I/0 I I I 27 MHz Figure 1. Parallel interface to a microcontroller. Table 1. Parallel Interface Description SDA SCL Serial data port Serial input clock Open collector Open collector Table 2. Serial Interface Description The 8-bit parallel interface works as follows. When ADDR strobe is low, the address register is enabled for writing or reading (timing details not shown here, see the CS4954 datasheet for timing information). As illustrated in Figures 2 and 3 the rising edge of the WR strobe active low with ADDR strobe still active will enable selecting the register address you want to access. The following active low WR or RD strobe, while ADDR strobe is disabled (HIGH) will give access to the register content for read or write. There is no automatic register increment/decrement function. To access a different register, you must select it first and then read or write to it. (See Appendix B for assembly code example.) Cirrus Logic, Inc. Crystal Semiconductor Products Division P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.crystal.com Copyright (c) Cirrus Logic, Inc. 1998 (All Rights Reserved) DEC `98 AN138REV1 1 AN138 ADDR TAS TWAC TWPW TWR WR RD TWDS PDAT[7:0] TW DH TWDS TWDH 03h 05h Figure 2. 8-bit parallel host port timing : write 05h in register 03h. ADDR TAS TWAC TWPW WR TREC TRPW RD TWDS PDAT[7:0] TW DH TRDA TRDH 03h Valid Data Figure 3. 8-bit parallel host port timing : read data in register 03h. Parameter Parallel Port Timing Write recovery time Address from write hold time Write pulse width Address setup time Write data setup time Write data hold time Write-Read/Read-Write recovery time Read pulse width Read data access time Read data hold time Symbol TWR TWAC TWPW TAS TWDS TWDH TREC TRPW TRDA TRDH Min 60 0 40 3 8 3 50 30 10 Max 40 50 Unit ns ns ns ns ns ns ns ns ns ns 2 AN138REV1 AN138 Vcc Vcc 2 k SX28 2 k CS4954 24 RC6 25 RC7 32 SDA 33 SCL WR 27 RD 16 ADDR 34 28 are HIGH. This is the idle state. The CS4954/5 can act as an I2C slave device only. It cannot be a bus master. In the case where there is more than one device on the I2C bus that has the same default Station Address as the CS4954/5 (default is 00), you need to sequence the reset of all the devices that are in conflict and change the Station Address of the CS4954/5 to avoid addressing problems. (See Appendix A for assembly code example.) The following communication example is for 3byte mode. To perform a write cycle, you must send the I2C Write Station Address, the Register Address and the data. The read operation consist of sending the I2C Write Station Address, the Register Address, and the I2C Read Station Address. The data will then be placed on the I2C bus. The I2C protocol also includes start and stop condition as well as acknowledge messages. The CS4954/5 supports auto-increment of the register address. Here are some examples: start / station address + write bit / ack / subaddress / ack / data / ack / data / ack / ... / stop start / station address + write bit / ack / subaddress / ack / station address + read bit / ack / data / stop RA3 OSC1 9 RESET 29 CLKIN 27 27 MHz Figure 4. Serial interface to a microcontroller. The serial interface is a 2-wire, I2C compatible interface. The SDA and SCL pins are open drains, therefore pull-ups are required for proper operation. When there is no activity on the bus, the lines Parameter Symbol Fclk Tsph Tspl Tsh Tssu Tsds Tsr Tsf Tss Tbuf Tdh Tvdo Min 100 0.1 0.7 100 100 50 100 100 0 - Typ - Max 1000 1 0.3 600 Unit KHz s s ns ns ns s s ns ns ns ns Host Port Timing SCL Frequency Clock Pulse High Time Clock Pulse Low Time Hold Time (Start Condition) Setup Time (Start Condition) Data Setup Time Rise Time Fall Time Setup Time (Stop Condition) Bus Free Time Data Hold Time SCL Low to Data Out Valid I2C AN138REV1 3 AN138 Tbuf SDA Tsr SCL Tsh Tdh Tsds Tsh Tss Tsph Tvdo Tspl 2 Tsf Tssu Figure 5. I C Host Port Timing. Understanding the station address of the CS4954/5 and how to change it: The CS4954/5 address register provides 7 bits for addressing, therefore you are limited to 128 possible addresses. These 7 bits represents the MSBs of the Station Address. According to the I2C specification, the LSB is the READ (1) or WRITE (0) strobe. For instance, 6Ah (in binary 0110 1010) is written in register 0x0Fh: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 res 1 1 0 1 0 1 0 CS4954 for access in parallel mode, and performing a read and write on the CS4954 via the parallel interface. The same procedure is used with the serial mode interface. This particular example shows how to enable the color bar generator. The reset pin does not need to be controlled by software, a simple RC network is sufficient. After a reset the CS4954/5 is accessible through the parallel port if both RD and WR pins are HIGH on the rising edge of the reset. If both pins are LOW the serial I2C mode is enabled and the parallel port becomes a general purpose I/O port. Also after a reset, the CS4954's DACs are disabled and powered down. Reset must be held low for at least 100 ns. The register address must be selected to prior to any type of access, Read or Write. To access register 00h, set ADDR low, then set WR low, write the register address on the data bus (in this case 00h) then de-assert WR and ADDR. Once this is, done all operations on the control port will reflect the content of this particular register. By writing 10h in register 00h the CS4954 will be in master mode and will not need timing cues to output the color bar. In the previous step, we have selected register 00h. To write data in the register, set WR low, write data to the data bus and de-assert the WR pin. If you use a fast micro-controller like the SX28AC make sure you allow for the 60 ns delay between writes. Follow the same steps, select the register 03h and then write the data to the register. This will enable the color bar generator. AN138REV1 I add. 2C Remember, these bits are the MSBs of the Station Address: Base Address Read/Write Base Address + (MSBs) strobe Read/Write strobe Read 1101 010 1 1101 0101 (D5) Write 1101 010 0 1101 0100 (D4) The value 6Ah written in the I C address register will effectively change the Station Address to D5h for reads and D4h for writes. When reading or writing to register 0x0Fh, Bit 7 should be ignored. 2 SOFTWARE DESCRIPTION Note : Refer to Appendices for complete code listing. The following flow chart describes the initialization of the microcontroller, configuring the 4 AN138 This register allows the DACs to be powered up. Remember not to power up all six DACs in low impedance mode; this will result in damaging the part. (See datasheet for details.) The composite DAC is now enabled. An NTSC 100% amplitude, 100% saturation signal is available on the composite DAC. By default, at power up the CS4954 will be configured for NTSC. START Initialize Microcontroller: * I/O driction, set levels to TTL * Enable pull-ups Initialize CS4954: * Reset * Set for parallel port access MAXIMUM CLOCK RATE The CS4954/5 requires a 27 MHz clock (twice the pixel rate). Since the SX28AC can accept a clock rate up to 50 MHz, the same clock was used by the micro-controller. If you want to use the code listed in the appendixes at a higher speed, ensure you observe the CS4954/5 timing requirements. Write Address of Register: * Select register 00h Write Data to Register: * Set the CS4954 in Master Mode Write 01h to Register 03h: * Enable the color bar Write 1Fh to Register 04h: * Power up composite DAC Write 60h to Register 05h: * Enable composite DAC End of Example Figure 6. AN138REV1 5 AN138 APPENDIX A ;----------------------------------------------------------------------------; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;----------------------------------------------------------------------------PROCESSOR: Scenix SX-28 R.S. This simple code assumes the microcontroller host is connected directly to the CS4954/55, with the micro acting as the I2C bus master, the CS4954 acting as a slave device, and no other devices on the I2C bus. 54DEMO_I.SRC: Example code illustrating the initialization and configuration of the CS4954/55 Digital Video Encoder via the I2C interface. Copyright CIRRUS LOGIC, INC. 1998 ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------; DEVICE CONFIGURATION ; SX-28 (28 pin) ; 4 pages of EEPROM (4 X 512 bytes) ; 8 banks of RAM (128 bytes) ; Extended stack (8 words deep) ; On reset, execution starts at label "main" ;----------------------------------------------------------------------------device device id reset pins28,pages4,banks8,oschs turbo,stackx,optionx '54 Init' main ;----------------------------------------------------------------------------; EQUATES ;----------------------------------------------------------------------------6 AN138REV1 AN138 ; Control signals connected to CS4954 inputs. wr_pin rd_pin padr_pin rst_pin = = = = ra.0 ra.1 ra.2 ra.3 Refer to CS4954 datasheet. ;Port A pin connected to CS4954's WR* ;Port A pin connected to CS4954's RD* ;Port A pin connected to CS4954's PADDR ;Port A pin connected to CS4954's RESET ; I2C interface signals sda_pin scl_pin = = rc.6 rc.7 ;Port C pin - I2C data line ;Port C pin - I2C clock line ; Miscellaneous constants bdelay CS4954_W CS4954_R = = = 40h 00h 01h ;delay loop counter ;CS4954 I2C "WRITE" addr (address + Write = 0) ;CS4954 I2C "READ" addr (address + Write = 1) ;----------------------------------------------------------------------------; VARIABLES - All reside in bank 0 ;----------------------------------------------------------------------------org VARS data_in data_out reg_addr i2c_data temp bcount EQU ds ds ds ds ds DS $10 $ 1 1 1 1 1 1 ;bit counter for I2C read/writes ;storage for data read from CS4954 ;storage for data to be written to CS4954 ;holds address of register to be read/written ;temp storage for byte shifted in/out on I2C bus ;----------------------------------------------------------------------------; MAIN PROGRAM (Memory Page 0) ;----------------------------------------------------------------------------org main $00 AN138REV1 7 AN138 ; Initialize the uController's ports ;set IO direction mov mov mov mov mov mov mov m,#$F ra,#%1111 !ra,#%0000 rb,#%11111111 !rb,#%00000000 rc,#%11111111 !rc,#%00000000 ;set mode for io direction ;init ra - all ones ;ra3-0 outputs ;init rb ;start out as outputs ;init rc - all ones ;start out as outputs ;turn on pullups mov mov mov mov m,#$E !ra,#%0000 !rb,#%00000000 !rc,#%00000000 ;set mode for pullups ;set input levels to TTL mov mov mov mov mov m,#$D !ra,#%0000 !rb,#%00000000 !rc,#%00000000 m,#$F ;set mode for io level ; all variables in bank 0 bank vars ; Initialize the CS4954 for i2c access. page call cfg_i2c cfg_i2c ; As an example, generate a color bar ;register 0 = 10h mov mov mov w,#$0 reg_addr,w w,#$10 ;write to register 0 8 AN138REV1 AN138 mov page call data_out,w write_reg write_reg ;write data byte of $10 ;register 3 = 01h mov mov mov mov page call w,#$3 reg_addr,w w,#$1 data_out,w write_reg write_reg ;write data byte of $01 ;write to register 3 ;register 4 = 1Fh mov mov mov mov page call w,#$4 reg_addr,w w,#$1F data_out,w write_reg write_reg ;write data byte of $1F ;write to register 4 ;register 5 = 60h mov mov mov mov page call w,#$5 reg_addr,w w,#$60 data_out,w write_reg write_reg ;write data byte of $60 ;write to register 5 ; An example register read - not used for anything here. ; read regsiter 4 mov mov page call mov w,#$4 reg_addr,w read_reg read_reg w,data_in ;loop here forever jmp $ AN138REV1 9 AN138 ;----------------------------------------------------------------------------; I2C INTERFACE ROUTINES (Memory page 1) ;----------------------------------------------------------------------------ORG 200h ;-----------------------------------------------------------------------------; SUBROUTINE: CFG_I2C ; Configure the CS4954 for I2C interface mode by setting RD* and WR* low and ; then holding the CS4954 in reset for > 100ns. ; ; Entry: Nothing assumed. ; ; Exit: ; ; Calls: Nothing ; ;-----------------------------------------------------------------------------cfg_i2c clrb clrb clrb nop nop nop nop setb retp rst_pin ;bring CS4954's reset high again ;now in I2C interface mode ;delay for at least 100ns rd_pin wr_pin rst_pin ;pull CS4954's reset low ;RD* and WR* held low CS4954/55 out of reset ;-----------------------------------------------------------------------------; SUBROUTINE: WRITE_REG ; Writes a byte to a CS4954 register using the I2C interface. ; ; Entry: REG_ADDR holds the CS4954 register address to be written to. ; ; ; Exit: ; DATA_OUT holds the data byte to be written. 10 AN138REV1 AN138 ; Calls: SND_START ; ; ; ;-----------------------------------------------------------------------------write_reg ; send a start-of-frame delimeter call snd_strt SND_BYTE SND_STOP ; send the I2C addr for CS4954 mov mov call w,#CS4954_W i2c_data,w snd_byte ; send the CS4954 register address mov mov call w,reg_addr i2c_data,w snd_byte ; send data to the addressed register mov mov call w,data_out i2c_data,w snd_byte ; send the end-of-frame delimeter call retp snd_stop ;-----------------------------------------------------------------------------; SUBROUTINE: READ_REG ; Read a byte from a CS4954 register using the I2C interface. ; ; Entry: REG_ADDR holds the CS4954 register address to be read. ; ; ; Exit: ; ; Calls: SND_START DATA_IN = byte read DATA_IN holds the data byte to be written. AN138REV1 11 AN138 ; ; ; ; ;-----------------------------------------------------------------------------read_reg ; send a start-of-frame delimeter call snd_strt SND_BYTE GET_BYTE SND_STOP ; send the I2C WRITE addr for CS4954 mov mov call w,#CS4954_W i2c_data,w snd_byte ; send the CS4954 register address mov mov call w,reg_addr i2c_data,w snd_byte ; send an end-of-frame delimeter call snd_stop ; now do a I2C read cycle to get the register's contents ; send a start-of-frame delimeter call snd_strt ; send the I2C READ addr for CS4954 mov mov call w,#CS4954_R i2c_data,w snd_byte ; read the register call mov mov get_byte w,i2c_data data_in,w ; send the end-of-frame delimeter call snd_stop 12 AN138REV1 AN138 retp ;-----------------------------------------------------------------------------; SUBROUTINE: SND_BYTE ; Send a byte on the I2C bus. ; ; Entry: I2C_DATA holds the byte to be written. ; ; Exit: ; ; Calls: DELAY ; ; ;-----------------------------------------------------------------------------snd_byte mov mov w,#08h bcount,w ;set a bit counter for 8 bits I2C_ACK I2C_DATA contents destroyed ; shift out 8 data bits :next_bit clrb call movb call setb call rl djnz clrb scl_pin delay delay scl_pin delay i2c_data bcount,:next_bit scl_pin ;set clock low ;make sure it is not a stop condition ;make sure is it is not a start condition ;set clock high ;let them settle ;shift to next bit ;entire byte written yet? ;bring clock low at end of last bit sda_pin,i2c_data.7;put the bit on data line ; create and ACK and return call retp i2c_ack ;-----------------------------------------------------------------------------; SUBROUTINE: GET_BYTE ; Read a byte from the I2C bus. ; ; Entry: Nothing assumed. AN138REV1 13 AN138 ; ; Exit: ; ; Calls: DELAY ; ; ;-----------------------------------------------------------------------------get_byte mov mov w,#08h bcount,w ;set a bit counter for 8 bits I2C_NACK I2C_DATA holds byte read. ; make sda_pin an input mov !rc,#%01000000 ; shift in 8 data bits :next_bit2 setb call movb call clrb call rl djnz rl scl_pin delay i2c_data.7,sda_pin;sample the bit on data line delay scl_pin delay i2c_data i2c_data ;shift to next bit ;shift last bit into place bcount,:next_bit2 ;entire byte read yet? ;set clock low ;set clock high ; make sda_pin an output again mov !rc,#%00000000 ; create and ACK and return call retp ;-----------------------------------------------------------------------------; SUBROUTINE: I2C_ACK ; Generate an I2C ACK (acknowledge). ; ; Entry: Nothing assumed. ; ; Exit: ; i2c_nack 14 AN138REV1 AN138 ; Calls: DELAY ; ;-----------------------------------------------------------------------------i2c_ack call delay ;rx pulls data low here (forced here - should poll for data = 0) clrb call sda_pin delay ;tx generates another clock during the ACK setb call clrb call retp scl_pin delay scl_pin delay ;-----------------------------------------------------------------------------; SUBROUTINE: I2C_NACK ; Generate an I2C ACK (NOT acknowledge). ; ; Entry: Nothing assumed. ; ; Exit: ; ; Calls: DELAY ; ;-----------------------------------------------------------------------------i2c_nack call delay ;tx forces data high setb call sda_pin delay ;tx generates another clock during the nACK setb call scl_pin delay AN138REV1 15 AN138 clrb call retp scl_pin delay ;-----------------------------------------------------------------------------; SUBROUTINE: SND_STRT ; Send I2C start-of-frame delimeter. ; ; Entry: Nothing assumed. ; ; Exit: ; ; Calls: DELAY ; ;-----------------------------------------------------------------------------snd_strt ;ensure both data and clock high setb setb call sda_pin scl_pin delay ;bring data low during clock high clrb call sda_pin delay ;now bring clock low to finish start delimeter clrb call retp scl_pin delay ;-----------------------------------------------------------------------------; SUBROUTINE: SND_STOP ; Send I2C end-of-frame delimeter. ; ; Entry: Nothing assumed. ; ; Exit: 16 AN138REV1 AN138 ; ; Calls: DELAY ; ;-----------------------------------------------------------------------------snd_stop ;make sure clock and data low clrb call clrb call sda_pin delay scl_pin delay ;next bring clock high setb call scl_pin delay ;now bring data high while clock high setb call call retp sda_pin delay delay ;make a gap at end of message ;-----------------------------------------------------------------------------; SUBROUTINE: DELAY ; Create a delay processing a busy loop. ; ; Entry: BDELAY holds loop counter. ; ; Exit: ; ; Calls: Nothing ; ;-----------------------------------------------------------------------------delay bitloop retp mov mov w,#bdelay temp,w djnz temp,bitloop;loop for bit time ;i2c bit delay loop constant AN138REV1 17 AN138 APPENDIX B : ;----------------------------------------------------------------------------; ; ; ; ; ; ; ; ; ; ; ;----------------------------------------------------------------------------PROCESSOR: Scenix SX-28, Microchip PIC 16C5X 54DEMO_P.SRC: Example code illustrating the initialization and configuration of the CS4954/55 Digital Video Encoder via the parallel host interface. Copyright CIRRUS LOGIC, INC. 1998 ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------; DEVICE CONFIGURATION ; SX-28 (28 pin) ; 4 pages of EEPROM (4 X 512 bytes) ; 8 banks of RAM (128 bytes) ; Extended stack (8 words deep) ; On reset, execution statrs at label "main" ;----------------------------------------------------------------------------device device id reset pins28,pages4,banks8,oschs turbo,stackx,optionx '54 Init' main ;----------------------------------------------------------------------------; EQUATES ;----------------------------------------------------------------------------; Control signals connected to CS4954 inputs. wr_pin rd_pin = = ra.0 ra.1 Refer to CS4954 datasheet. ;Port A pin connected to CS4954's WR* ;Port A pin connected to CS4954's RD* 18 AN138REV1 AN138 padr_pin rst_pin = = ra.2 ra.3 ;Port A pin connected to CS4954's PADDR ;Port A pin connected to CS4954's RESET ;----------------------------------------------------------------------------; VARIABLES - All reside in bank 0 ;----------------------------------------------------------------------------org VARS data_in data_out reg_addr EQU ds ds ds $10 $ 1 1 1 ;storage for data read from CS4954 ;storage for data to be written to CS4954 ;holds address of register to be read/written ;----------------------------------------------------------------------------; MAIN PROGRAM (Memory Page 0) ;----------------------------------------------------------------------------org main ; Initialize the uController's ports ;set IO direction mov mov mov mov mov mov mov m,#$F ra,#%1111 !ra,#%0000 rb,#%11111111 !rb,#%00000000 rc,#%11111111 !rc,#%00000000 ;set mode for io direction ;init ra - all ones ;ra3-0 outputs ;init rb ;start out as outputs ;init rc - all ones ;start out as outputs $00 ;turn on pullups mov mov mov mov m,#$E !ra,#%0000 !rb,#%00000000 !rc,#%00000000 ;set mode for pullups ;set input levels to TTL AN138REV1 19 AN138 mov mov mov mov mov m,#$D !ra,#%0000 !rb,#%00000000 !rc,#%00000000 m,#$F ;set mode for io level ; all variables in bank 0 bank vars ; Initialize the CS4954 for parallel access page call cfg_para cfg_para ; For this example, enable color bar generation. ;register 0 = 10h mov mov mov mov page call w,#$0 reg_addr,w w,#$10 data_out,w write_reg write_reg ;write data byte of $10 ;write to register 0 ;register 3 = 01h mov mov mov mov page call w,#$3 reg_addr,w w,#$1 data_out,w write_reg write_reg ;write data byte of $01 ;write to register 3 ;register 4 = 1Fh mov mov mov mov page call w,#$4 reg_addr,w w,#$1F data_out,w write_reg write_reg ;write data byte of $1F ;write to register 4 20 AN138REV1 AN138 ;register 5 = 60h mov mov mov mov page call w,#$5 reg_addr,w w,#$60 data_out,w write_reg write_reg ;write data byte of $60 ;write to register 5 ; Read register 5 back to demonstrate a register read. mov mov page call mov w,#$5 reg_addr,w read_reg read_reg w,data_in ;read the register ;register address = 5 ;loop here forever jmp $ ;----------------------------------------------------------------------------; I2C INTERFACE ROUTINES (Memory page 1) ;----------------------------------------------------------------------------ORG 200h ;-----------------------------------------------------------------------------; SUBROUTINE: CFG_PARA ; Configure the CS4954 for parallel interface mode by setting RD* and WR* high and ; then holding the CS4954 in reset for > 100ns. ; Entry: Nothing assumed. ; ; Exit: ; ; Calls: Nothing ; ;-----------------------------------------------------------------------------cfg_para setb setb rd_pin wr_pin ;RD* and WR* held high CS4954/55 out of reset AN138REV1 21 AN138 clrb nop nop nop nop setb retp rst_pin ;bring CS4954's reset high again ;now in parallel interface mode ;delay for at least 100ns rst_pin ;pull CS4954's reset low ;-----------------------------------------------------------------------------; SUBROUTINE: READ_REG ; Read a byte from a CS4954 register using the parallel host interface. ; ; Entry: REG_ADDR holds the CS4954 register address to be read. ; ; ; Exit: ; ; Calls: Nothing ; ;-----------------------------------------------------------------------------read_reg ; config port b for output mov mov mov w,#$F m,w !rb,#$0 DATA_IN = byte read DATA_IN holds the data byte to be written. ; send register address clrb clrb mov mov setb setb padr_pin wr_pin w,reg_addr rb,w wr_pin padr_pin ;write register address ;de-assert WR* and PADR* ;latch register address ;set PADR* active low ;set WR* active low ; config port b for input mov mov mov w,#$F m,w !rb,#$FF 22 AN138REV1 AN138 ; read register clrb nop nop mov mov setb retp ;-----------------------------------------------------------------------------; SUBROUTINE: WRITE_REG ; Writes a byte to a CS4954 register using the parallel host interface. ; ; Entry: REG_ADDR holds the CS4954 register address to be written to. ; ; ; Exit: ; ; Calls: Nothing ; ;-----------------------------------------------------------------------------; ; Write to a CS4954 register via parallel interface ; write_reg ; config port b for output mov mov mov w,#$F m,w !rb,#$0 DATA_OUT holds the data byte to be written. w, rb data_in, w rd_pin ;read register data ;de-assert RD* rd_pin ;assert RD* active low ;delay > 40ns ; send register address clrb clrb mov mov setb setb padr_pin wr_pin w,reg_addr rb,w wr_pin padr_pin ;write register address ;de-assert WR* and PADR* ;latch register address ;set PADR* active low ;set WR* active low AN138REV1 23 AN138 ; write data to register nop nop clrb mov mov setb retp wr_pin w, data_out rb, w wr_pin ;write data ;de-assert WR* ;delay > 60ns between writes ;assert WR* active low 24 AN138REV1 * Notes * |
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